Design and Test of Computing-In Memories

Jin Fu Li

doi:10.1109/ISOCC56007.2022.10031451

Design and Test of Computing-In Memories

Jin Fu Li

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

摘要

Computing-in-memory architecture is one good candidate for overcoming the memory-wall bottleneck of von Neumann computing architecture. Many approaches were proposed to modify different types of memories to support the computing function. This paper provides a brief tutorial on computing-in memory (CIM) designs and test techniques. Also, some challenges of CIM design and testing are discussed.

原文	???core.languages.en_GB???
主出版物標題	Proceedings - International SoC Design Conference 2022, ISOCC 2022
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	157-158
頁數	2
ISBN（電子）	9781665459716
DOIs	https://doi.org/10.1109/ISOCC56007.2022.10031451
出版狀態	已出版 - 2022
事件	19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of 持續時間: 19 10月 2022 → 22 10月 2022

出版系列

名字	Proceedings - International SoC Design Conference 2022, ISOCC 2022

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	19th International System-on-Chip Design Conference, ISOCC 2022
國家/地區	Korea, Republic of
城市	Gangneung-si
期間	19/10/22 → 22/10/22

存取文件

10.1109/ISOCC56007.2022.10031451

應用於人體姿勢辨識與機器人之可重組深度神經網路引擎－總計畫暨子計畫一：應用於監督式學習之可重組深度神經網路技術(1/3)(3/3)
Li, J.-F. (PI)
1/08/21 → 31/07/22
研究計畫: Research
深度神經網路系統之強健性與可靠性增強技術(3/3)
Li, J.-F. (PI)
1/08/21 → 31/07/22
研究計畫: Research

引用此

@inproceedings{f5da04bbb02f4f6187cef565c5427f2d,

title = "Design and Test of Computing-In Memories",

abstract = "Computing-in-memory architecture is one good candidate for overcoming the memory-wall bottleneck of von Neumann computing architecture. Many approaches were proposed to modify different types of memories to support the computing function. This paper provides a brief tutorial on computing-in memory (CIM) designs and test techniques. Also, some challenges of CIM design and testing are discussed.",

keywords = "MAC, computing-in memory, test",

author = "Li, {Jin Fu}",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 19th International System-on-Chip Design Conference, ISOCC 2022 ; Conference date: 19-10-2022 Through 22-10-2022",

year = "2022",

doi = "10.1109/ISOCC56007.2022.10031451",

language = "???core.languages.en_GB???",

series = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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booktitle = "Proceedings - International SoC Design Conference 2022, ISOCC 2022",

}

Li, JF 2022, Design and Test of Computing-In Memories. 於 Proceedings - International SoC Design Conference 2022, ISOCC 2022. Proceedings - International SoC Design Conference 2022, ISOCC 2022, Institute of Electrical and Electronics Engineers Inc., 頁 157-158, 19th International System-on-Chip Design Conference, ISOCC 2022, Gangneung-si, Korea, Republic of, 19/10/22. https://doi.org/10.1109/ISOCC56007.2022.10031451

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PY - 2022

Y1 - 2022

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AB - Computing-in-memory architecture is one good candidate for overcoming the memory-wall bottleneck of von Neumann computing architecture. Many approaches were proposed to modify different types of memories to support the computing function. This paper provides a brief tutorial on computing-in memory (CIM) designs and test techniques. Also, some challenges of CIM design and testing are discussed.

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KW - test

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DO - 10.1109/ISOCC56007.2022.10031451

M3 - 會議論文篇章

AN - SCOPUS:85148430602

T3 - Proceedings - International SoC Design Conference 2022, ISOCC 2022

SP - 157

EP - 158

BT - Proceedings - International SoC Design Conference 2022, ISOCC 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 19th International System-on-Chip Design Conference, ISOCC 2022

Y2 - 19 October 2022 through 22 October 2022

ER -

Design and Test of Computing-In Memories

摘要

出版系列

???event.eventtypes.event.conference???

存取文件

指紋

專案

應用於人體姿勢辨識與機器人之可重組深度神經網路引擎－總計畫暨子計畫一： 應用於監督式學習之可重組深度神經網路技術(1/3)(3/3)

深度神經網路系統之強健性與可靠性增強技術(3/3)

引用此

應用於人體姿勢辨識與機器人之可重組深度神經網路引擎－總計畫暨子計畫一：應用於監督式學習之可重組深度神經網路技術(1/3)(3/3)