Design and implementation of a FFT/IFFT soft IP generator for OFDM system

Tsung Han Tsai, Chen Chi Peng

研究成果: 雜誌貢獻會議論文同行評審

2 引文 斯高帕斯(Scopus)


In this paper, we design an automatic generation environment for hardware accelerator of Fast Fourier Transform (FFT) and inverse Fast Fourier Transform (IFFT) with various parameters. The target application is the FFT/IFFT core from 8 to 8192 points for OFDM systems. With different input parameters and constrains, our FFT/IFFT Soft IP generator can automatically generate a complete design results including the synthesizable Verilog HDL code, test bench, and synthesis scripts files. We also produce the on-chip-bus interface circuit compliant with the AMBA protocol and associated device driver so that the generated IP is ready for system-on-chip (SOC) integration. Therefore, not only reducing the time-to-market development cost, the proposed design can provide a reuse and programmable IP core which is suitable for the SoC applications.

頁(從 - 到)385-386
期刊Digest of Technical Papers - IEEE International Conference on Consumer Electronics
出版狀態已出版 - 2005
事件2005 Digest of Technical Papers - International Conference on Consumer Electronics, ICCE 2005 - Las Vegas, NV, United States
持續時間: 8 1月 200512 1月 2005


深入研究「Design and implementation of a FFT/IFFT soft IP generator for OFDM system」主題。共同形成了獨特的指紋。