摘要
A $Ka$ -band monolithic high-efficiency frequency quadrupler using a GaAs heterojunction bipolar transistor and pseudomorphic high electron-mobility transistor technology is presented in this paper. The frequency quadrupler is constructed cascading two frequency doublers. The frequency doubler employs a modified common-base/common-source topology to enhance the second harmonic efficiently. The dc bias condition, harmonic output power, conversion gain, and efficiency for variable configurations are investigated. Two phase-shifter networks are used to reduce phase error and improve the fundamental rejection. Between 23-30 GHz, the proposed frequency quadrupler features a conversion gain of higher than $-$ 1 dB with an input power of 4 dBm. The maximum conversion gain is 2.7 dB at 28 GHz with an efficiency of up to 8% and a power-added efficiency of 3.6%. The maximum output 1-dB compression point $(P-{1\ {\rm {dB}}})$ and the saturation output power $(P-{\rm sat})$ are higher than 7 and 8.2 dBm, respectively. The overall chip size is ${\hbox {2}}\times {\hbox {1}}\ {\hbox {mm}}2.
原文 | ???core.languages.en_GB??? |
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文章編號 | 2277991 |
頁(從 - 到) | 3674-3689 |
頁數 | 16 |
期刊 | IEEE Transactions on Microwave Theory and Techniques |
卷 | 61 |
發行號 | 10 |
DOIs | |
出版狀態 | 已出版 - 2013 |