Design and Analysis of a 44-GHz MMIC Low-Loss Built-in Linearizer for High-Linearity Medium Power Amplifiers

Jeng Han Tsai, Hong Yeh Chang, Pei Si Wu, Yi Lin Lee, Tian Wei Huang, Huei Wang

研究成果: 雜誌貢獻期刊論文同行評審

47 引文 斯高帕斯(Scopus)


A 44-GHz monolithic microwave integrated circuit (MMIC) low-loss built-in linearizer using a shunt cold-mode high-electron mobility transistor (HEMT), based on the predistortion techniques, is presented in this paper. The proposed cold-mode HEMT linearizer can enhance the linearity of the power amplifier (PA) with a low insertion loss (IL < 2 dB), a compact die-size, and no additional dc power consumption. These advantages make the linearizer more suitable for millimeter-wave (MMW) applications. The physical mechanism of the gain expansion characteristics of the proposed linearizer is analyzed. A systematic design procedure for a low-loss linearizer is developed, which includes: 1) insertion loss minimization through a device-size selection and 2) linearity optimization through a two-tone test. To demonstrate the general usefulness of the proposed linearizer, the linearizer was applied to a two-stage 44-GHz MMIC medium PA and a commercial MMW PA module. After linearization, the output spectrum regrowth is suppressed by 7–9 dB. To keep the adjacent channel power ratio below —40 dBc, the output power has been doubled from 15 to 18 dBm at 44 GHz. The error vector magnitude of the 16-quadrature amplitude modulation signal can be reduced from 6.11% to 3.87% after linearization. To the best of our knowledge, this is the first multistage MMW PA with a low-loss built-in linearizer.

頁(從 - 到)2487-2496
期刊IEEE Transactions on Microwave Theory and Techniques
出版狀態已出版 - 6 6月 2006


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