Configurable 8T SRAM for Enbling in-Memory Computing

Han Chun Chen; Jin Fu Li; Chun Lung Hsu; Chi Tien Sun

doi:10.1109/ICCET.2019.8726871

Configurable 8T SRAM for Enbling in-Memory Computing

Han Chun Chen, Jin Fu Li, Chun Lung Hsu, Chi Tien Sun

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

12 引文斯高帕斯（Scopus）

摘要

To cope with the memory wall of von-Neumann computing architecture, the in-memory-computing (IMC) architecture has been proposed. The IMC architecture embeds logic into the memory array to reduce the data transfer between the processor and memory. This paper proposes a configurable 8T SRAM which can provide the functions of ternary content address memory, left shift, and right shift in addition to the storage function. The method only needs to modify the peripheral circuitry of an 8 $T$ SRAM. The Hspice simulator is used to verify configurable 8T SRAM using TSMC 0.18μm CMOS technology.

原文	???core.languages.en_GB???
主出版物標題	2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	112-116
頁數	5
ISBN（電子）	9781728114392
DOIs	https://doi.org/10.1109/ICCET.2019.8726871
出版狀態	已出版 - 4月 2019
事件	2nd International Conference on Communication Engineering and Technology, ICCET 2019 - Nagoya, Japan 持續時間: 12 4月 2019 → 15 4月 2019

出版系列

名字	2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	2nd International Conference on Communication Engineering and Technology, ICCET 2019
國家/地區	Japan
城市	Nagoya
期間	12/04/19 → 15/04/19

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10.1109/ICCET.2019.8726871

引用此

Chen, H. C., Li, J. F., Hsu, C. L., & Sun, C. T. (2019). Configurable 8T SRAM for Enbling in-Memory Computing. 於 2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019 (頁 112-116). 文章 8726871 (2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCET.2019.8726871

@inproceedings{03cb70d0d0974ab78df8609004501034,

title = "Configurable 8T SRAM for Enbling in-Memory Computing",

abstract = "To cope with the memory wall of von-Neumann computing architecture, the in-memory-computing (IMC) architecture has been proposed. The IMC architecture embeds logic into the memory array to reduce the data transfer between the processor and memory. This paper proposes a configurable 8T SRAM which can provide the functions of ternary content address memory, left shift, and right shift in addition to the storage function. The method only needs to modify the peripheral circuitry of an 8 $T$ SRAM. The Hspice simulator is used to verify configurable 8T SRAM using TSMC 0.18μm CMOS technology.",

keywords = "computing architecture, content addressable memory, static random access memory",

author = "Chen, {Han Chun} and Li, {Jin Fu} and Hsu, {Chun Lung} and Sun, {Chi Tien}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2nd International Conference on Communication Engineering and Technology, ICCET 2019 ; Conference date: 12-04-2019 Through 15-04-2019",

year = "2019",

month = apr,

doi = "10.1109/ICCET.2019.8726871",

language = "???core.languages.en_GB???",

series = "2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019",

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Chen, HC, Li, JF , Hsu, CL & Sun, CT 2019, Configurable 8T SRAM for Enbling in-Memory Computing. 於 2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019., 8726871, 2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019, Institute of Electrical and Electronics Engineers Inc., 頁 112-116, 2nd International Conference on Communication Engineering and Technology, ICCET 2019, Nagoya, Japan, 12/04/19. https://doi.org/10.1109/ICCET.2019.8726871

Configurable 8T SRAM for Enbling in-Memory Computing. / Chen, Han Chun; Li, Jin Fu ; Hsu, Chun Lung 等.
2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 112-116 8726871 (2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019).

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

TY - GEN

T1 - Configurable 8T SRAM for Enbling in-Memory Computing

AU - Chen, Han Chun

AU - Li, Jin Fu

AU - Hsu, Chun Lung

AU - Sun, Chi Tien

PY - 2019/4

Y1 - 2019/4

N2 - To cope with the memory wall of von-Neumann computing architecture, the in-memory-computing (IMC) architecture has been proposed. The IMC architecture embeds logic into the memory array to reduce the data transfer between the processor and memory. This paper proposes a configurable 8T SRAM which can provide the functions of ternary content address memory, left shift, and right shift in addition to the storage function. The method only needs to modify the peripheral circuitry of an 8 $T$ SRAM. The Hspice simulator is used to verify configurable 8T SRAM using TSMC 0.18μm CMOS technology.

AB - To cope with the memory wall of von-Neumann computing architecture, the in-memory-computing (IMC) architecture has been proposed. The IMC architecture embeds logic into the memory array to reduce the data transfer between the processor and memory. This paper proposes a configurable 8T SRAM which can provide the functions of ternary content address memory, left shift, and right shift in addition to the storage function. The method only needs to modify the peripheral circuitry of an 8 $T$ SRAM. The Hspice simulator is used to verify configurable 8T SRAM using TSMC 0.18μm CMOS technology.

KW - computing architecture

KW - content addressable memory

KW - static random access memory

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T3 - 2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019

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BT - 2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2nd International Conference on Communication Engineering and Technology, ICCET 2019

Y2 - 12 April 2019 through 15 April 2019

ER -

Chen HC, Li JF , Hsu CL, Sun CT. Configurable 8T SRAM for Enbling in-Memory Computing. 於 2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 112-116. 8726871. (2019 2nd International Conference on Communication Engineering and Technology, ICCET 2019). doi: 10.1109/ICCET.2019.8726871

Configurable 8T SRAM for Enbling in-Memory Computing

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