Built-in self-diagnosis and test time reduction techniques for NAND flash memories

Che Wei Chou, Chih Sheng Hou, Jin Fu Li

研究成果: 書貢獻/報告類型會議論文篇章同行評審

3 引文 斯高帕斯(Scopus)

摘要

This paper presents a low-cost built-in self-diagnosis (BISD) scheme for NAND flash memories, which can support the March-like test algorithms with page-oriented data backgrounds. Two simple test time reduction techniques are also proposed to reduce the test time. Experimental results show that the proposed BISD circuit for a 2M-bit flash memory only needs 1.7K gates. Also, the proposed test time reduction techniques can effectively reduce the test time. Analysis results show that they can reduce the test time to 48.628% of the normal test scheme for a 4G-bit flash memory tested by the March-FT test algorithm with solid data backgrounds.

原文???core.languages.en_GB???
主出版物標題Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
頁面260-263
頁數4
DOIs
出版狀態已出版 - 2011
事件2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 - Hsinchu, Taiwan
持續時間: 25 4月 201128 4月 2011

出版系列

名字Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

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???event.eventtypes.event.conference???2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
國家/地區Taiwan
城市Hsinchu
期間25/04/1128/04/11

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