Broadband and low-loss 1:9 transmission-line transformer in 0.18-μm CMOS process

Hwann Kaeo Chiou, Hsein Yuan Liao

研究成果: 雜誌貢獻期刊論文同行評審

13 引文 斯高帕斯(Scopus)

摘要

This letter proposes a transmission-line transformer (TLT) with high impedance-transformation ratio of 1:9 for wideband power amplifier design. The 1:9 TLT is realized with broadside-coupled and multiple-metal stacked transmission lines and achieves a broadband impedance transformation from 5.0±0.1Ω optimal load impedance of the power cell to 50-Ω load with a bandwidth of 4.4 to 6.6 GHz, which covers the required bandwidth of the IEEE 802.11a WLAN application. The measured minimum insertion loss is 1.07 dB at 5.8 GHz with a 3-dB bandwidth of 164%. This 1:9 TLT is fabricated in standard 0.18-μm CMOS process with a chip area of 426μm×589μm including the test pad.

原文???core.languages.en_GB???
文章編號5518370
頁(從 - 到)921-923
頁數3
期刊IEEE Electron Device Letters
31
發行號9
DOIs
出版狀態已出版 - 9月 2010

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