@inproceedings{927a7b3520a1445fa1f48af77df5cbca,
title = "BIST-assisted tuning scheme for minimizing io-channel power of TSV-based 3D DRAMs",
abstract = "Three-dimensional dynamic random access memory (3D DRAM) using through-silicon via (TSV) has been acknowledged as one good approach for overcoming the memory wall. However, the IO-channel power of a TSV-based 3D DRAM represents a significant portion of the 3D DRAM power. In this paper, we propose a built-in self-test (BIST) -assisted tuning scheme to adjust the driving capability of programmable drivers to fit the number of stacked 3D DRAM dies such that the IO-channel power can be minimized. A BIST design supporting specific test patterns and test flow for the driver tuning is proposed as well. Simulation results show that about 6.16×10 - 2 J energy saving can be achieved for a logic-DRAM stack with 150fF/die TSV load under 100s write operations if the proposed BIST-assisted tuning scheme is implemented in the logic die.",
keywords = "3D IC, BIST, DRAM, at-speed test, low power, through silicon via",
author = "Yu, {Yun Chao} and Yang, {Chi Chun} and Li, {Jin Fu} and Lo, {Chih Yen} and Chen, {Chao Hsun} and Lai, {Jenn Shiang} and Kwai, {Ding Ming} and Chou, {Yung Fa} and Wu, {Cheng Wen}",
note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 23rd Asian Test Symposium, ATS 2014 ; Conference date: 16-11-2014 Through 19-11-2014",
year = "2014",
month = dec,
day = "7",
doi = "10.1109/ATS.2014.13",
language = "???core.languages.en_GB???",
series = "Proceedings of the Asian Test Symposium",
publisher = "IEEE Computer Society",
pages = "1--6",
booktitle = "Proceedings - 23rd Asian Test Symposium, ATS 2014",
}