BDD based lambda set selection in Roth-Karp decomposition for LUT architecture

Jie Hong Jiang, Jing Yang Jou, Juinn Dar Huang, Jung Shian Wei

研究成果: 會議貢獻類型會議論文同行評審

5 引文 斯高帕斯(Scopus)

摘要

Field Programmable Gate Arrays (FPGA's) are important devices for rapid system prototyping. Roth-Karp decomposition is one of the most popular decomposition techniques for Look-Up Table (LUT)-based FPGA technology mapping. In this paper, we propose a novel algorithm based on Binary Decision Diagrams (BDD's) for selecting good lambda set variables in Roth-Karp decomposition to minimize the number of consumed configurable logic blocks (CLB's) in FPGA's. The experimental results on a set of benchmarks show that our algorithm can produce much better results than those of the previous approach.

原文???core.languages.en_GB???
頁面259-264
頁數6
出版狀態已出版 - 1997
事件Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC - Chiba, Jpn
持續時間: 28 1月 199731 1月 1997

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???event.eventtypes.event.conference???Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC
城市Chiba, Jpn
期間28/01/9731/01/97

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