Auto-calibration techniques in built-in jitter measurement circuit

Chih Ping Cheng, Jen Chieh Liu, Kuo Hsing Cheng

研究成果: 書貢獻/報告類型會議論文篇章同行評審

摘要

This paper presents a built-in jitter measurement (BIJM) circuit with auto-calibration techniques for 1 GHz clock signal measurement. To measure the cycle-to-cycle jitter, a self-referenced circuit, without an external reference clock, is applied. A multi-phase oscillator (MPO) and a timing amplifier (TA) are used to enhance the timing resolution and to generate the high-speed multi-phase outputs for a multi-phase sampler (MPS). In order to against the process variation, the calibration circuits are applied to calibrate the MPO timing resolution and the TA gain. They are rewarded with a reduction of the variation of the MPO timing resolution by 65% and a reduction of the variation of the TA gain by 61.2% under the process variation, respectively.

原文???core.languages.en_GB???
主出版物標題Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012
頁面248-249
頁數2
DOIs
出版狀態已出版 - 2012
事件2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012 - Tallinn, Estonia
持續時間: 18 4月 201220 4月 2012

出版系列

名字Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012

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???event.eventtypes.event.conference???2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2012
國家/地區Estonia
城市Tallinn
期間18/04/1220/04/12

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