Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications

Cihun Siyong Alex Gong, Muh Tian Shiue, Ci Tong Hong, Chun Hsien Su, Kai Wen Yao

研究成果: 書貢獻/報告類型會議論文篇章同行評審

3 引文 斯高帕斯(Scopus)

摘要

A complementary energy path adiabatic logic (CEPAL) designed for ubiquitous large-scaled digital systems achieves higher noise immunity, higher driving ability, and reduced power density than the prior quasi-static structure. By applying CEPAL to the clocked storage elements (i.e. DFFs) with a diode-shared scheme, the overall efficiency is dramatically improved without increasing the design overhead compared with the quasi-static implementation. A test module consists of an 8-bit CEPAL shift register (SFR) has been laid out in a 0.18-μm CMOS process. Post-layout analytic results, including parasitic effect and exhibiting the benefits of various aspects in the proposed fashion, are given as proof of concept.

原文???core.languages.en_GB???
主出版物標題Proceedings - 20th Anniversary IEEE International SOC Conference
頁面247-250
頁數4
DOIs
出版狀態已出版 - 2007
事件20th Anniversary IEEE International SOC Conference - Hsinchu, Taiwan
持續時間: 26 9月 200729 9月 2007

出版系列

名字Proceedings - 20th Anniversary IEEE International SOC Conference

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???event.eventtypes.event.conference???20th Anniversary IEEE International SOC Conference
國家/地區Taiwan
城市Hsinchu
期間26/09/0729/09/07

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