An embedded three-bit-per-cell two-transistors and one-ferroelectric-capacitance nonvolatile memory

E. R. Hsieh, Z. Y. Wang, C. F. Huang, Y. S. Wu

研究成果: 雜誌貢獻期刊論文同行評審

4 引文 斯高帕斯(Scopus)

摘要

We present a nonvolatile memory of two transistors and one ferroelectric-capacitancewith the three-bitper- cell capability. With a control transistor, thememory can be turned-off correctly when the ferroelectric capacitance is programmed such that the threshold- voltage of the unit cell shifts to a deep negative value. This unit cell can be programmed in 80 ns and erased in 20 ns. The conductance can be tuned gradually in 2.5 × 104 folds of the on-off ratio with 30 cycles by pulse operations. The eight conductance values can be cycled more than 107 times. Data stored in distinguished eight conductance values can be retained in 80 Celsius degrees for ten years. This work offers an applicable solution for embedded non-volatile memories with ferroelectric mechanisms.

原文???core.languages.en_GB???
頁(從 - 到)1460-1463
頁數4
期刊IEEE Electron Device Letters
42
發行號10
DOIs
出版狀態已出版 - 10月 2021

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