An electronic system level design and performance evaluation for multimedia applications

Tsung Han Tsai, Yu Nan Pan, Chia Hung Lin

研究成果: 書貢獻/報告類型會議論文篇章同行評審

6 引文 斯高帕斯(Scopus)

摘要

With complexities of Systems-on-Chips (SoCs) rising almost daily, the system designers have been searching for new design methodology that can handle given complexities with decreased times-to-market. The obvious solution that comes to mind is increasing the level of abstraction. However the system designers also care about the system architectures, HW/SW performance, and communication protocols. Furtheore, the transaction-level model (TLM) can satisfy the requests on complex design with relative high simulation speed and well performance evaluation. In this paper, we implement a TLM-based Network-on-Chip (NoC) platform and share-bus system architecture with SystemC. We also implement the H.263 encoder as the system application, and apply a design methodology at Electronic-System Level (ESL) to make design modeling, design space exploration and performance evaluation. Out platform is able to evaluate performance in relatively short time, obtain important information and complete the design more instinctively. In addition, we compare and contrast the NoC and share-bus system architectures in terms of evaluation performance. In experimental result, the performance bottleneck in communication congestion is solved well by using the NoC instead of using the share-bus design.

原文???core.languages.en_GB???
主出版物標題Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008q
頁面621-624
頁數4
DOIs
出版狀態已出版 - 2008
事件2008 International Conference on Embedded Software and Systems, ICESS-08 - Chengdu, Sichuan, China
持續時間: 29 7月 200831 7月 2008

出版系列

名字Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008

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???event.eventtypes.event.conference???2008 International Conference on Embedded Software and Systems, ICESS-08
國家/地區China
城市Chengdu, Sichuan
期間29/07/0831/07/08

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