An efficient approach for error diagnosis in HDL design

Che Hua Shi, Jing Yang Jou

研究成果: 雜誌貢獻會議論文同行評審

11 引文 斯高帕斯(Scopus)

摘要

The growing of the modern design complexity leads the design error diagnosis to be a challenge for designers. In this paper, we propose an efficient approach for design error diagnosis automatically for designs in HDL. This approach can handle multiple errors occurring in a HDL design simultaneously with only one test case by analyzing the simulation outputs of the incorrect implementation. Furthermore, this approach reduces the error space by eliminating those statements that have no or lower possibility to become the error sources with retaining at least one error source in it. Hence, the effort spent on the debugging process can be greatly reduced.

原文???core.languages.en_GB???
頁(從 - 到)IV732-IV735
期刊Proceedings - IEEE International Symposium on Circuits and Systems
4
出版狀態已出版 - 2003
事件Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
持續時間: 25 5月 200328 5月 2003

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