An ARM-based system-on-a-programmable-chip architecture for spoken language translation

Shun Chieh Lin, Jia Ching Wang

研究成果: 雜誌貢獻期刊論文同行評審

2 引文 斯高帕斯(Scopus)

摘要

Previous research shows that there are two architectures for spoken language translation (SLT) system implementation. One is client-server based systems that should be built on the server computer but unreliability of the remote connection. The other is to build portable stand-alone devices but it lacks real-time performance. In this brief, a system-on-a-programmable-chip (SoPC) solution is proposed by realizing the entire SLT system within a single chip. This SoPC is characterized by small size, low cost, real-time operation, and high portability. This entire design was implemented on ALTERA EPXA10 device. Performance for English-to-Mandarin translation process can be completed within 1 s at a 46.22-MHz clock frequency with 3000 translation patterns. The total logic usage of the EPXA10 device is 50% (about 19318 logic cells).

原文???core.languages.en_GB???
頁(從 - 到)765-769
頁數5
期刊IEEE Transactions on Circuits and Systems II: Express Briefs
54
發行號9
DOIs
出版狀態已出版 - 9月 2007

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