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An adaptive low-power control scheme for on-chip network applications
Chun Lung Hsu
, Chang Hsin Cheng, Yu Sheng Huang, Chih Jung Chen
電機工程學系
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Engineering
System-on-Chip
100%
Control Scheme
100%
Power Control
100%
Network Application
100%
Simulation Result
50%
Interconnects
50%
Network-on-Chip
50%
Error Rate
50%
Voltage Scaling
50%
Error Detection
50%
Conflicting Goal
50%
Data Link
50%
Power Control Policy
50%
Keyphrases
Network on chip
100%
Power Control Strategy
100%
Low-power Management
100%
System-on-chip
33%
Low Energy
33%
Energy Consumption
33%
Error Rate
33%
System-on-chip Design
33%
Signal Integrity
33%
On-chip Interconnects
33%
Conflicting Goals
33%
Dynamic Voltage Scaling
33%
Scaling Approach
33%
Error-detecting Codes
33%
Power Control Policy
33%
Low-swing Signaling
33%
Heterogeneous multiprocessor Systems
33%
Computer Science
Network Application
100%
System-on-Chip
100%
Energy Consumption
50%
Networks on Chips
50%
Error Detection
50%
Signal Integrity
50%
Transmitted Bit
50%
Dynamic Voltage Scaling
50%
Heterogeneous Multiprocessor
50%
Central Element
50%