This paper describes a 2GS/s 10bit DAC with a supply voltage lower to 1 volt. It has been realized in a 90-nm 1P9M CMOS technology. A novel high precision active cascode mirror circuit is presented. Provided the headroom is not affected, operating the current source in the triode region, the precision of the current source array can be obtained. In addition, the demand of low analog/digital supply voltage and the influence of MOS short-channel effect can be overcome. The INL is between +0.12 and -0.14 LSB, and the DNL is between +0.23 and -0.35 LSB. When the DAC operates at an input signal frequency of 10MHz, a SFDR of 65.1dB can be achieved. Moreover, a SFDR of 54.4dB can be gained when the DAC operates at 982.2MHz. The power consumption of the proposed design is approximately 79mW. The chip area is about 1mm × 1mm.