A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop

Ching Chi Chang, Chien Chih Lin, Muh Tian Shiue, Chorng Kuang Wang

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

This paper proposes a two-fold carrier recovery loop that possesses /spl plusmn/25000-ppm pull-in range and 7-ms acquisition time for 64-QAM blind adaptive system. The carrier recovery system contains a prior wide-band loop to acquire a coarse carrier frequency and a posterior narrow-band loop to achieve -82 dBc jitter suppression. It can be applied to a 4.035-MHz low-IF cable modem system with the /spl plusmn/100-kHz frequency offset tolerance requirement. The two-fold carrier recovery loop operates in consecutive three stages, which are Costas carrier phase estimation, DDML carrier phase estimation, and DD-MMSE carrier phase estimation. The proposed architecture is hardware efficient since the three-staged operation shares most of the circuit functions.

原文???core.languages.en_GB???
主出版物標題ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
頁面358-361
頁數4
DOIs
出版狀態已出版 - 2001
事件2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
持續時間: 6 5月 20019 5月 2001

出版系列

名字ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
4

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???event.eventtypes.event.conference???2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
國家/地區Australia
城市Sydney, NSW
期間6/05/019/05/01

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