A variable duty cycle with high-resolution synchronous mirror delay

Keyphrases

• High-resolution 100%
• Synchronous Mirror Delay 100%
• Variable Duty Cycle 100%
• Clock Skew 60%
• CMOS Process 20%
• Lock Time 20%
• Fast Lock 20%
• Phase Shifter 20%
• Power Supply 20%
• Internal Clock 20%
• Consumption Power 20%
• External Clock 20%

Engineering

• High Resolution 100%
• Duty Cycle 100%
• Power Supply 50%
• Electric Power Utilization 50%
• Clock Cycle 50%
• Phase Shifters 50%
• Internal Clock 50%