A three-bit-per-cell via-type resistive random access memory gated metal-oxide semiconductor field-effect transistor non-volatile memory with the FORMing-free characteristic

E. Ray Hsieh, Yi Xiang Huang, You Hung Ye, Zih Ying Wang

研究成果: 雜誌貢獻期刊論文同行評審

5 引文 斯高帕斯(Scopus)

摘要

We present an embedded memory for possible neuromorphic computing applications using a via-type resistive random access memory (RRAM) gated metal-oxide semiconductor field-effect transistor (MOSFET). By this arrangement, the threshold voltage (Vth) of the MOSFET is modulated by the resistance of the via-type RRAM. When the resistance of the via-type RRAM is in a high-resistance state (HRS), the word-line voltage (VWL) is consumed mostly across the via-type RRAM and little is left on the gate dielectric layer of the MOSFET; the Vth of the MOSFET is boosted. In contrast, when the resistance of the via-type RRAM is in a low-resistance state (LRS), with the resistance value much smaller than that of the gate dielectric of the MOSFET, the VWL will be dropped majorly on the gate dielectric of the MOSFET, and the Vth of the MOSFET will be much reduced than that of the MOSFET gated by the via-type RRAM in a HRS. The experimental results show that, in a direct-current mode, the memory window achieves 1 V between a LRS and a HRS of the via-type RRAM gated MOSFET. In an alternating current mode, the LRS can be SET at 10 nanoseconds; the HRS can be RESET at 5 nanoseconds. Furthermore, three-bit-per-cell operation of the via-type RRAM gated MOSFET is demonstrated. The eight conductance states are distributed evenly between 100 micro- and 100 picosiemens with almost isometric gaps in between. The endurance tests were executed for eight conductance states with one million cycles for four pairs. Finally, the retention tests of eight states were kept under 125 C for one month.

原文???core.languages.en_GB???
文章編號124002
期刊Semiconductor Science and Technology
36
發行號12
DOIs
出版狀態已出版 - 12月 2021

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