This paper proposes a simple and effective built-in self-repair (BISR) scheme for content addressable memories (CAMs) with address-input-free writing function. A programmable built-in self-test (BIST) circuit is designed to generate different March-like test algorithms which can cover typical random access memory faults and comparison faults. A reconfigurable priority encoder is proposed to skip faulty words of a defective CAM. The delay penalty incurred by the reconfigurable priority encoder is regardless of the number of used spare rows. Analysis and simulation results show that the proposed BISR scheme can efficiently improve the reliability of the CAM. The area cost of the BISR design is only about 4.87% for a 256×128 bit CAM with 7 spare words.
|頁（從 - 到）||493-507|
|期刊||Journal of Information Science and Engineering|
|出版狀態||已出版 - 5月 2013|