A Reconfigurable Accelerator Design for Quantized Depthwise Separable Convolutions

Yu Guang Chen, Hung Yi Chiang, Chi Wei Hsu, Tsung Han Hsieh, Jing Yang Jou

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

Convolutional Neural Networks (CNNs) are widely applied in various computer version applications such as object recognition and image classification. With large amount of Multiply Accumulate Operations (MACs) in CNN computations, it is a trend to process the data locally at edge devices to avoid significant data movement. MobileNets were proposed as a light-weight neural network for mobile and embedded devices by using depthwise separable convolutions. Moreover, to further reduce commutation efforts, quantization can be appropriately applied to MobileNets without significant accuracy loss. To provide an efficient computation platform for quantized MobileNets, in this paper we propose a novel performance-Aware reconfigurable accelerator design which prefect fit the depthwise separable convolutions. Experimental results show that we can achieve 16% area reduction and 1.07x speedup compared to previous MobileNets accelerator design.

原文???core.languages.en_GB???
主出版物標題Proceedings - International SoC Design Conference 2021, ISOCC 2021
發行者Institute of Electrical and Electronics Engineers Inc.
頁面290-291
頁數2
ISBN(電子)9781665401746
DOIs
出版狀態已出版 - 2021
事件18th International System-on-Chip Design Conference, ISOCC 2021 - Jeju Island, Korea, Republic of
持續時間: 6 10月 20219 10月 2021

出版系列

名字Proceedings - International SoC Design Conference 2021, ISOCC 2021

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???event.eventtypes.event.conference???18th International System-on-Chip Design Conference, ISOCC 2021
國家/地區Korea, Republic of
城市Jeju Island
期間6/10/219/10/21

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