A phase-detect synchronous mirror delay for clock skew-compensation circuits

Keyphrases

• Synchronous Mirror Delay 100%
• Compensation Circuit 100%
• Clock Compensation 100%
• Delay Circuits 57%
• Clock Signal 42%
• Narrow Pulse 42%
• Duty Cycle 28%
• Input Buffer 14%
• Operation Frequency 14%
• Power Dissipation 14%
• CMOS Process 14%
• SPICE Model 14%
• Delay Cell 14%
• Clock Frequency 14%
• Frequency Tuning Range 14%
• Phase Detector 14%
• Static Phase Error 14%

Engineering

• Delay Circuits 100%
• Clock Signal 75%
• Narrow Pulse 75%
• Simulation Result 50%
• Duty Cycle 50%
• Clock Cycle 50%
• Surface Mount Technology 50%
• Input Buffer 25%
• Phase Error 25%
• Energy Dissipation 25%
• Clock Frequency 25%
• Phase Detector 25%

Computer Science

• Clock Cycle 100%
• Clock Skew 100%
• Clock Frequency 25%
• tuning range 25%
• Phase Detector 25%
• Energy Dissipation 25%