A Partial Page Cache Strategy for NVRAM-Based Storage Devices

Shuo Han Chen, Tseng Yi Chen, Yuan Hao Chang, Hsin Wen Wei, Wei Kuan Shih

研究成果: 雜誌貢獻期刊論文同行評審

3 引文 斯高帕斯(Scopus)

摘要

Nonvolatile random access memory (NVRAM) is becoming a popular alternative as the memory and storage medium in battery-powered embedded systems because of its fast read/write performance, byte-addressability, and nonvolatility. A well-known example is phase-change memory (PCM) that has much longer life expectancy and faster access performance than NAND flash. When NVRAM is considered as both main memory and storage in battery-powered embedded systems, existing page cache mechanisms have too many unnecessary data movements between main memory and storage. To tackle this issue, we propose the concept of "union page cache", to jointly manage data of the page cache in both main memory and storage. To realize this concept, we design a partial page cache strategy that considers both main memory and storage as its management space. This strategy can eliminate unnecessary data movements between main memory and storage without sacrificing the data integrity of file systems. A series of experiments was conducted on an embedded platform. The results show that the proposed strategy can improve the file accessing performance up to 85.62% when PCM used as a case study.

原文???core.languages.en_GB???
文章編號8576565
頁(從 - 到)373-386
頁數14
期刊IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
39
發行號2
DOIs
出版狀態已出版 - 2月 2020

指紋

深入研究「A Partial Page Cache Strategy for NVRAM-Based Storage Devices」主題。共同形成了獨特的指紋。

引用此