A numerical study of thermal and electrical effects in a vertical LED chip

Farn Shiun Hwu, Jyh Chen Chen, Sheng Han Tu, Gwo Jiun Sheu, Hsueh I. Chen, Jinn Kong Sheu

研究成果: 雜誌貢獻期刊論文同行評審

29 引文 斯高帕斯(Scopus)

摘要

The influence of the size of an n-electrode and a current blocking layer (CBL) on the thermal and electrical characteristics of a vertical-injection GaN-based light emitting diode (LED) chip is investigated by numerical simulation. The predicted forward voltages are quite consistent with previous experimental data. The coupled thermal and electrical effects affect the performance of a LED chip. For cases without a CBL, the variation in current density and temperature distributions in the active layer, and the forward voltage and Joule heating percentage of the LED chip increase as the n-electrode width (L) decreases. The current crowding and temperature of the hot spot are very significant, although the wall-plug efficiency (WPE) is the highest one obtained for L=100 μm. The better width of the n-electrode in terms of the uniformity of temperature, current density distribution, WPE, and forward voltage may be the case where L=200 μm. The insertion of a CBL into a 600 × 600 μm chip leads to greater uniformity in the distribution of the current density in the effective light-emitting area when L=500 μm. A more uniform temperature distribution in the active layer occurs when L=200 μm, while the case when L=300 μm has the maximum WPE.

原文???core.languages.en_GB???
頁(從 - 到)H31-H37
期刊Journal of the Electrochemical Society
157
發行號1
DOIs
出版狀態已出版 - 2010

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