A Novel Architecture to Build Ideal-linearity Neuromorphic Synapses on a Pure Logic FinFET Platform Featuring 2.5ns PGM-time and 1012 Endurance

E. R. Hsieh, H. Y. Chang, Steve S. Chung, T. P. Chen, S. A. Huang, T. J. Chen, Osbert Cheng, S. Simon Wong

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

1 引文 斯高帕斯（Scopus）

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Engineering & Materials Science