A new variation plot to examine the interfacial-dipole induced work-function variation in advanced high-k metal-gate CMOS devices

E. R. Hsieh, Y. D. Wang, Steve S. Chung, J. C. Ke, C. W. Yang, S. Hsu

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

The interfacial dipole and bulk trap in HKMG stack have been found to be significant to the work function variation (σVWF), in addition to the metal grains. In order to differentiate their effects on σVWF, a new variation plot is proposed and the dipole and trap effects can be distinguished. Here, we propose a simple experimental method to separate the effects of MG/HK and HK/IL interfacial dipoles. In pMOSFET, HK/IL dipoles dominate HK induced variation; MG/HK dipoles are dominant in nMOSFET. However, in terms of the reliability test, after PBTI stress, HK bulk traps play a major role in the variation of nMOSFET, while after NBTI, HK/IL dipoles are strengthened by hydrogen bonds and still dominant in work function variation of pMOSFET. Design guideline is provided to deal with the passivation of high-k traps by nitrogen concentration and the improvement of variability in HKMG CMOS devices.

原文???core.languages.en_GB???
主出版物標題2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781509006373
DOIs
出版狀態已出版 - 21 9月 2016
事件36th IEEE Symposium on VLSI Technology, VLSI Technology 2016 - Honolulu, United States
持續時間: 13 6月 201616 6月 2016

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
2016-September
ISSN(列印)0743-1562

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???event.eventtypes.event.conference???36th IEEE Symposium on VLSI Technology, VLSI Technology 2016
國家/地區United States
城市Honolulu
期間13/06/1616/06/16

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