A new type of inverter with juctionless (J-Less) transistors

E. R. Hsieh, Steve S. Chung

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

A new type of inverter built on a specific channel without source/drain junction is proposed. This inverter can be formed by a connected n- and p-doped channel as the substrate and with complementary p- and n-doped gates respectively. The transistor operation is in accumulation mode, different from the conventional CMOS devices with inversion mode of operation. Extensive simulations have been made to demonstrate this transistor with high current density and good short channel control on 10nm technology and beyond. Good inverter characteristics are also shown. This new inverter device will be ready for the 20nm node and beyond.

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主出版物標題2010 Silicon Nanoelectronics Workshop, SNW 2010
DOIs
出版狀態已出版 - 2010
事件2010 15th Silicon Nanoelectronics Workshop, SNW 2010 - Honolulu, HI, United States
持續時間: 13 6月 201014 6月 2010

出版系列

名字2010 Silicon Nanoelectronics Workshop, SNW 2010

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???event.eventtypes.event.conference???2010 15th Silicon Nanoelectronics Workshop, SNW 2010
國家/地區United States
城市Honolulu, HI
期間13/06/1014/06/10

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