A new method for constructing IP level power model based on power sensitivity

Heng Liang Huang, Jiing Yuan Lin, Wen Zen Shen, Jing Yang Jou

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

This paper proposes a nominal point selection method for IP (Intellectual Property) level power model based on power sensitivity. By analyzing the relationship between the dynamic power consumption of CMOS circuits and their input signal statistics, three nominal points are efficiently selected to construct a power model based on power sensitivity. Our experimental results on a number of benchmark circuits show the effectiveness of the proposed method. Estimation accuracy within 5.78% of transistor level simulations is achieved.

原文???core.languages.en_GB???
主出版物標題Proceedings of the 2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000
頁面135-139
頁數5
DOIs
出版狀態已出版 - 2000
事件2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000 - Yokohama, Japan
持續時間: 25 1月 200028 1月 2000

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

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???event.eventtypes.event.conference???2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000
國家/地區Japan
城市Yokohama
期間25/01/0028/01/00

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