A low-power high driving ability voltage control oscillator used in PLL

K. H. Cheng, W. B. Yang, C. F. Chung

研究成果: 雜誌貢獻會議論文同行評審

1 引文 斯高帕斯(Scopus)

摘要

Modern high speed CMOS processors using on-chip phase-locked-loops often require a clock buffer with stringent specifications on the signal's rise time and fall time rather than on the buffer's delay time. For these applications we propose a novel voltage controlled oscillator (VCO) with split path CMOS driver. It can be proposed to reduce the total power consumption and phase errors of the PLL. The proposed VCO with the split-path CMOS driver has low power consumption and lower area requirement than that achievable by the traditional tapered CMOS buffer.

原文???core.languages.en_GB???
頁(從 - 到)IV614-IV617
期刊Materials Research Society Symposium - Proceedings
626
出版狀態已出版 - 2001
事件Thermoelectric Materials 2000-The Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications - San Francisco, CA, United States
持續時間: 24 4月 200027 4月 2000

指紋

深入研究「A low-power high driving ability voltage control oscillator used in PLL」主題。共同形成了獨特的指紋。

引用此