A low power and variable-length FFT processor design for flexible MIMO OFDM systems

Chun Lung Hung, Syu Siang Long, Muh Tian Shiue

研究成果: 書貢獻/報告類型會議論文篇章同行評審

14 引文 斯高帕斯(Scopus)

摘要

In this paper, we present a low power and variable-length design of fast Fourier transform (FFT) processor for flexible MIMO-OFDM applications. In this work, mixed-radix-2/4/8 algorithm and new continuous-flow method are applied to achieve variable-length of 1K/2K/4K/8K points and in-order output. Furthermore, ping-pong cache memory architecture and optimized data scaling strategy are also applied to reduce main memory accesses up to 50% and achieve higher SQNR requirements of 16/64-QAM signals for multi-standards. A test chip of the proposed FFT processor has been designed and fabricated using CMOS 0.18μm 1P6M process with the core area of 4.96mm2. Our proposed processor can perform four independent data sequences of 2048-point FFT within 205.2 μs at operating clock rate of 20 MHz. The power consumption of calculating single 8192-point FFT sequence is only 20.88mW at operating clock rate of 10 MHz.

原文???core.languages.en_GB???
主出版物標題2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
頁面705-708
頁數4
DOIs
出版狀態已出版 - 2009
事件2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
持續時間: 24 5月 200927 5月 2009

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

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???event.eventtypes.event.conference???2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
國家/地區Taiwan
城市Taipei
期間24/05/0927/05/09

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