A Low Power 16 Gbps CTLE and Quarter-Rate DFE with Single Adaptive System

Kuo Hsing Cheng, Chun Yao Chang, Hong Yi Huang, Yun Teng Shih

研究成果: 書貢獻/報告類型會議論文篇章同行評審

摘要

This article presents a low-power 16-Gbps equalizer with a single adaptive system. A novel equalizer architecture relaxes the timing constraint of decision feedback equalizer (DFE) from one period to two periods. Thus, we are able utilize low-power techniques to realize DFE to reach better power efficiency. The data path is composed of a continuous time linear equalizer (CTLE) and 2-tap DFE. To achieve a lower bit error rate (BER), sign-sign least-mean-square (SS-LMS) algorithm is adopted to provide an optimum gain of CTLE and tap weight of DFE simultaneously. This chip is fabricated with TSMC 90 nm (TN90GUTM)1P9M CMOS process and occupies an active area of 0.047 mm2. The proposed adaptive equalizer can compensate for the channel loss up to 16 dB at 16 Gb/s. The power consumption is 4.24 mW from 1.0V supply, and achieves the figure of merit of 0.265mW/Gbps and 0.0165 mW/dB/Gbps.

原文???core.languages.en_GB???
主出版物標題ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems
主出版物子標題Technosapiens for Saving Humanity
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350326499
DOIs
出版狀態已出版 - 2023
事件30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023 - Istanbul, Turkey
持續時間: 4 12月 20237 12月 2023

出版系列

名字ICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023
國家/地區Turkey
城市Istanbul
期間4/12/237/12/23

指紋

深入研究「A Low Power 16 Gbps CTLE and Quarter-Rate DFE with Single Adaptive System」主題。共同形成了獨特的指紋。

引用此