A low impact ionization rate poly-Si TFT with a current and electric field split design

Feng Tso Chien, Kuang Po Hsueh, Zhen Jie Hong, Kuan Ting Lin, Yao Tsung Tsai, Hsien Chin Chiu

研究成果: 雜誌貢獻期刊論文同行評審

4 引文 斯高帕斯(Scopus)

摘要

In this study, a novel low impact ionization rate (low-IIR) poly-Si thin film transistor featuring a current and electric field split (CES) structure with bottom field plate (BFP) and partial thicker channel raised source/drain (RSD) designs is proposed and demonstrated. The bottom field plate design can allure the electron and alter the electron current path to evade the high electric field area and therefore reduce the device IIR and suppress the kink effect. A two-dimensional device simulator was applied to describe and compare the current path, electric field magnitude distributions, and IIR of the proposed structure and conventional devices. In addition, the advantages of a partial thicker channel RSD design are present, and the leakage current of CES-thin-film transistor (TFT) can be reduced and the ON/OFF current ratio be improved, owing to a smaller drain electric field.

原文???core.languages.en_GB???
文章編號514
期刊Coatings
9
發行號8
DOIs
出版狀態已出版 - 1 8月 2019

指紋

深入研究「A low impact ionization rate poly-Si TFT with a current and electric field split design」主題。共同形成了獨特的指紋。

引用此