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A low-computation-cycle design of input-decimation technique for RIDFT algorithm
Chih Feng Wu, Chun Hung Chen,
Muh Tian Shiue
電機工程學系
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Keyphrases
Low Computation
100%
Cycle Design
100%
Fourier Transform Algorithm
100%
Inverse Discrete Fourier Transform
100%
Recursive Inverse
100%
Proposed Design
25%
Supply Voltage
25%
Computational Complexity
25%
Power Consumption
25%
Computational Efficiency
25%
Time Requirement
25%
CMOS Process
25%
Real multiplication
25%
Input Sequence
25%
Broadband Communication Systems
25%
Computing Time
25%
Physical Implementation
25%
High-speed Broadband
25%
Implementation Results
25%
Recursive Filter
25%
Energy-efficient Design
25%
Engineering
Recursive
100%
Inverse Discrete Fourier Transform
100%
Computation Cycle
100%
Cycle Design
100%
Energy Engineering
25%
Electric Power Utilization
25%
Supply Voltage
25%
Computational Complexity
25%
Computational Efficiency
25%
Communication System
25%
Broadband Communication
25%
Input Sequence
25%
Physical Implementation
25%
Computing Time
25%
IIR Filter
25%
Computer Science
Fourier Transform
100%
Computation Cycle
100%
Computational Complexity
25%
Power Consumption
25%
Energy Efficient
25%
Time Requirement
25%
Supply Voltage
25%
Computational Efficiency
25%
Physical Implementation
25%
Broadband Communication
25%
Total Computation
25%