A Low-Complexity Generalized Memory Addressing Scheme for Continuous-Flow Fast Fourier Transform

Syu Siang Long, Meng Yao Hong, Muh Tian Shiue

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

In this paper, a control logic-reduced memory addressing scheme with a modified arithmetic processing unit (PE) for memory-based fast Fourier transform (FFT) is presented. The proposed scheme supports the conflict-free memory accessing and continuous-flow (CF) FFT operation. Furthermore, the timing delay is independent of FFT length and the circuit area is minimized in the proposed address generator. A case study of radix-4 256-point CF-FFT is analyzed. The comparison results synthesized with 90nm CMOS technology show that the hardware complexity is significantly reduced. Therefore, the proposed addressing scheme is suitable for high radix algorithm and long FFT length applications.

原文???core.languages.en_GB???
主出版物標題2018 3rd International Conference on Computer and Communication Systems, ICCCS 2018
發行者Institute of Electrical and Electronics Engineers Inc.
頁面502-505
頁數4
ISBN(列印)9781538663509
DOIs
出版狀態已出版 - 11 9月 2018
事件3rd International Conference on Computer and Communication Systems, ICCCS 2018 - Nagoya, Japan
持續時間: 27 4月 201830 4月 2018

出版系列

名字2018 3rd International Conference on Computer and Communication Systems, ICCCS 2018

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???event.eventtypes.event.conference???3rd International Conference on Computer and Communication Systems, ICCCS 2018
國家/地區Japan
城市Nagoya
期間27/04/1830/04/18

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