A low complexity fingerprint verification algorithm with reduced hardware resources

Jia Hong Dai, Ching Han Chen

研究成果: 雜誌貢獻期刊論文同行評審

1 引文 斯高帕斯(Scopus)

摘要

A low complexity fingerprint verification scheme with ultra-compact hardware resources requirement is presented in the paper. Firstly, the fingerprint image is captured and performed noise canceling by a binary low-pass filter. Secondly, the displacement of the fingerprint pattern is estimated by means of directional image matching, and then circular profile features of the fingerprint are extracted for verification matching. Finally, the proposed method is implemented in an 8-bits microcontroller run at 25MHz, equipped only with 12 Kbytes program code memory and 35 Kbytes data memory. It is very favorable for prototyping the low-cost fingerprint verification SoC (System-OnChip).

原文???core.languages.en_GB???
頁(從 - 到)859-873
頁數15
期刊Journal of Information Science and Engineering
24
發行號3
出版狀態已出版 - 5月 2008

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