A high-speed 850-nm optical receiver by integrating Si photodiode and CMOS IC

In this work, three approaches are proposed to implement high-speed 850-nm optical receivers fully in standard bulk 0.18 μm silicon (Si) CMOS technology. In the first approach, the lateral p-i-n photodiode (PD) with designed block well to limit the photocarriers being generated from the laterally depleted regions is integrated in optical receiver. The receiver consists of TIA, LA, offset-cancellation-network and buffer to provide a conversion gain of 110 dBfi and data rate of 2.5 Gbps operation. In the second receiver, the spatially modulated PD (SMPD) with -3 dB bandwidth of 590 MHz is integrated in optical receiver with the extra adaptive equalizer and demonstrates a data rate of 3.125 Gbps. Finally, the proposed novel structure of PD eliminates the slow diffusion photocarriers by using body contact design to create a new current path under the PD. A bandwidth of 2.8 GHz with 100 % improvement in PD is obtained. The eye diagrams of PD with cable connected amplifiers at 2.5 Gbps, 4 Gbps and 5 Gbps are demonstrated. Furthermore, the optical receiver's optical-electrical (O-E) conversion bandwidth is also increased from 3.6 GHz to 4.3 GHz. To our knowledge, these are the highest O-E conversion bandwidth of the PD and optical receiver ever reported by using the standard bulk 0.18 μm Si CMOS technology.