A difference detector PFD for low jitter PLL

Kuo Hsing Cheng, Tse Hua Yao, Shu Yu Jiang, Wei Bin Yang

研究成果: 書貢獻/報告類型會議論文篇章同行評審

33 引文 斯高帕斯(Scopus)

摘要

For high speed and low jitter PLL application, a new phase frequency detector (PFD) with difference detector is proposed. Because the proposed difference detector PFD (dd-PFD) doesn't have any feedback path in phase frequency detector circuit, it can be operated up to 1.6GHz. Furthermore, with difference detector, the dd-PFD has three-state, so it will not have phase errors and jitter problems. The dead zone of dd-PFD is 16ps. The proposed PFD is designed using 0.35um CMOS technology at 3.3V power supply.

原文???core.languages.en_GB???
主出版物標題ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems
頁面43-46
頁數4
出版狀態已出版 - 2001
事件8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001 - , Malta
持續時間: 2 9月 20015 9月 2001

出版系列

名字Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
1

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???event.eventtypes.event.conference???8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001
國家/地區Malta
期間2/09/015/09/01

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