A CNN Accelerator on FPGA using Binary Weight Networks

Tsung Han Tsai, Yuan Chen Ho

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

At present, convolutional neural networks have good performance while performing the object recognition tasks, but it relies on GPUs to solve a large number of complex operations. Therefore, the hardware accelerator of the neural network has become a central topic in the hardware researchers. This letter presents the design of an FPGA-based neural network accelerator implemented on the Xilinx Zynq-7020 FPGA. We use the binary LeNet model to achieve 91% accuracy in the MNIST dataset and use binary AlexNet model to achieve 67% accuracy in the CIFAR-10 dataset. Meanwhile the hardware resource is only about 10% usage on FPGA of the original design.

原文???core.languages.en_GB???
主出版物標題2020 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2020
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728173993
DOIs
出版狀態已出版 - 28 9月 2020
事件7th IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2020 - Taoyuan, Taiwan
持續時間: 28 9月 202030 9月 2020

出版系列

名字2020 IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2020

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???event.eventtypes.event.conference???7th IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2020
國家/地區Taiwan
城市Taoyuan
期間28/09/2030/09/20

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