A CMOS adaptive equalizer using low-voltage zero generators technique

Yu Chang Tsai, Kuo Hsing Cheng, Yen Hsueh Wu, Ying Fu Lin

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

This paper presents a 5 Gb/s adaptive equalizer that compensates for the FR-4 channel loss of 14 dB at 2.5 GHz. This equalizing filter uses low-voltage zero generators (LVZGs) to generate high-frequency tunable gain boosting without inductors. The power detector combines current steering techniques and a pre-amplifier circuit to enhance the voltage swing. This design consumes 17.6 mW (excluding the output buffers) at a 1.6 V supply voltage with an output swing of 560 mV (p-p). The area occupied is 0.1 mm2 (including output buffers), and output peak-to-peak jitter is 0.28 UI. The equalizer achieves high frequency compensation, small area, and low power consumption.

原文???core.languages.en_GB???
主出版物標題ESSCIRC 2010 - 36th European Solid State Circuits Conference
頁面546-549
頁數4
DOIs
出版狀態已出版 - 2010
事件36th European Solid State Circuits Conference, ESSCIRC 2010 - Sevilla, Spain
持續時間: 14 9月 201016 9月 2010

出版系列

名字ESSCIRC 2010 - 36th European Solid State Circuits Conference

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???event.eventtypes.event.conference???36th European Solid State Circuits Conference, ESSCIRC 2010
國家/地區Spain
城市Sevilla
期間14/09/1016/09/10

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