A broadband high efficiency high output power frequency doubler

研究成果: 雜誌貢獻期刊論文同行評審

18 引文 斯高帕斯(Scopus)

摘要

An 8 to 30 GHz broadband high efficiency, high output power frequency doubler using 0.5 μm AlGaAs/InGaAs enhancement-mode pseudomorphic high electronic mobility transistor process is presented in this paper. A common-gate/common-source field effect transistor pair is employed in the balanced doubler. With an input power of 8 dBm, this work features a conversion gain of better than -4 dB with a fundamental rejection of better than 13 dB over the operation bandwidth. The output 1 dB compression point (P1 dB) and the saturation output power (Psat) are higher than 7.3 and 10 dBm, respectively. This work presents the highest figure-of-merit (FOM) of 25.14 as compared to other previously reported broadband doublers.

原文???core.languages.en_GB???
文章編號5427078
頁(從 - 到)226-228
頁數3
期刊IEEE Microwave and Wireless Components Letters
20
發行號4
DOIs
出版狀態已出版 - 4月 2010

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