A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering

Yo Hao Tu, Kai Wen Yao, Ming Hao Huang, Yu Yun Lin, Hao Yu Chi, Po Min Cheng, Pei Yun Tsai, Muh Tian Shiue, Chien Nan Liu, Kuo Hsing Cheng, Jia Shiang Fu

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

A body sensor node system-on-chip (SoC) is designed and implemented. The SoC integrates analog front end (AFE), a high-resolution analog-to-digital converter (ADC), an RF-to-DC rectifier, a low dropout (LDO) regulator, and a digital signal processing (DSP) block. The batteryless SoC is powered by RF of 2.45GHz. The rectifier generates 1.8V output and the LDO converts the voltage to stable 1.6V supply for AFE, ADC, and DSP blocks. A pseudo-resistor with huge resistance is used in AFE to support tunable low cut-off frequency and to facilitate compact SoC integration. The DSP can be set to deliver raw data, wavelet-domain data, and compressed-sensing (CS) data. The entire SoC is 1.7×2.5 mm2 and can support invasive/non-invasive health-monitoring with low power consumption.

原文???core.languages.en_GB???
主出版物標題2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781509039692
DOIs
出版狀態已出版 - 5 6月 2017
事件2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017 - Hsinchu, Taiwan
持續時間: 24 4月 201727 4月 2017

出版系列

名字2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017

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???event.eventtypes.event.conference???2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017
國家/地區Taiwan
城市Hsinchu
期間24/04/1727/04/17

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