In this paper, a 76-98 GHz broadband low-dc-power low noise amplifier (LNA) using 40 nm CMOS process is presented. The coplanar-waveguide (CPW) structures are employed in the matching network of the LNA to further reduce the loss from the silicon substrate and the conductance. The LNA is designed using three stages of common-source amplifier. The measured 3-dB bandwidth of the LNA is from 76 to 98 GHz with a maximum small-signal gain of 10.5 dB at 87.5 GHz. The measured noise figure is lower than 8 dB with a minimum noise figure of 5.5 dB at 98 GHz. The measured output 1-dB compression point is higher than -2 dBm at 94 GHz. The total DC power consumption is 11.4 mW with a supply voltage of 0.9 V. The chip size is 0.779×0.742 mm 2 . The proposed LNA can be compared to prior art, and it is suitable for some W-band transceiver applications.