A 63GHz VCO using a standard 0.25μm CMOS process

Ren Chieh Liu, Hong Yeh Chang, Chi Hsueh Wang, Huei Wang

研究成果: 雜誌貢獻會議論文同行評審

4 引文 斯高帕斯(Scopus)

摘要

A 63GHz VCO using a 0.25μm 1P6M CMOS is presented. It achieves an output power of -4dBm without any output amplifier. This VCO is tunable over a 2.56Hz range and its phase noise is -85 dBc/Hz at 1MHz offset. The IC covers an area of 0.315mm2 and consumes 118mW maximum.

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頁(從 - 到)368-369
頁數2
期刊Digest of Technical Papers - IEEE International Solid-State Circuits Conference
47
出版狀態已出版 - 2003
事件Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement - San Francisco, CA., United States
持續時間: 15 2月 200319 2月 2003

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