A 5.8-GHz power amplifier with an on-chip tunable output matching network

Yi Chun Lee, Jia Shiang Fu

研究成果: 書貢獻/報告類型會議論文篇章同行評審

2 引文 斯高帕斯(Scopus)

摘要

The power efficiency of power amplifiers (PAs) at low drive levels can be enhanced if the load impedance presented to the transistors can be adjusted using a tunable output matching network. In this work, a 5.8-GHz PA with an on-chip tunable output matching network on a GaAs 0.15-m pHEMT process is presented. As opposed to most of the previous work in the literature, the varactor-based continuously tunable matching network presented here is fully-integrated. Moreover, in this work, another PA with a fixed output matching network is fabricated on the same chip with the tunable PA for the purpose of comparison. The measured saturation power levels for both PAs are 22.2 dBm. At the output power level of 17.5 dBm, a 4% PAE improvement is observed. This translates into a 16% reduction in DC power consumption.

原文???core.languages.en_GB???
主出版物標題Asia-Pacific Microwave Conference Proceedings, APMC 2011
頁面219-222
頁數4
出版狀態已出版 - 2011
事件Asia-Pacific Microwave Conference, APMC 2011 - Melbourne, VIC, Australia
持續時間: 5 12月 20118 12月 2011

出版系列

名字Asia-Pacific Microwave Conference Proceedings, APMC

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???event.eventtypes.event.conference???Asia-Pacific Microwave Conference, APMC 2011
國家/地區Australia
城市Melbourne, VIC
期間5/12/118/12/11

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