A 5 to 10.5 GHz Low-power Wideband I/Q Transmitter with Integrated Current-Mode Logic Frequency Divider

Hwann Kaeo Chiou, Wei Min Sung

研究成果: 書貢獻/報告類型會議論文篇章同行評審

3 引文 斯高帕斯(Scopus)

摘要

This paper presents a 5-10.5 GHz wideband fully-integrated I/Q transmitter in tsmc 90-nm CMOS technology. A current-mode passive mixer was adopted to enhance the linearity and low-power performance. The transmitter also integrated current-mode logic (CML) frequency divider (FD) to generate I/Q signals at LO-port. The I/Q signals were directly combined by using high-Q top-metal lines. An inductively coupled resonator (ICR) wideband output matching network was used to transform balance to unbalance output signal in RF drive-amplifier. The proposed transmitter achieves a 3-dB bandwidth from 5 to 10.5 GHz, a conversion gain of 12.9 dB, an output P1dB of -4.17 dBm, an output IP3 of 16.47 dBm, a carrier suppression of 30.02 dBc and a sideband suppression of 39.62 dBc under an LO power of 14 dBm at the center frequency of 8 GHz. The chip consumed dc power of 66.36 mW. The chip dimensions, including all RF and DC pads, are 1.25 × 1.1

原文???core.languages.en_GB???
主出版物標題Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728100739
DOIs
出版狀態已出版 - 4月 2019
事件22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019 - Cluj-Napoca, Romania
持續時間: 24 4月 201926 4月 2019

出版系列

名字Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019

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???event.eventtypes.event.conference???22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019
國家/地區Romania
城市Cluj-Napoca
期間24/04/1926/04/19

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