A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications

Jhe Wei Li; Wei Cheng Chen; Jung Chou; Yu Cheng Liu; Hong Yeh Chang

doi:10.1109/EuMIC48047.2021.00072

A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications

Jhe Wei Li, Wei Cheng Chen, Jung Chou, Yu Cheng Liu, Hong Yeh Chang

電機工程學系

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

3 引文斯高帕斯（Scopus）

摘要

In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is-130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.

原文	???core.languages.en_GB???
主出版物標題	EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	241-244
頁數	4
ISBN（電子）	9782874870606
DOIs	https://doi.org/10.1109/EuMIC48047.2021.00072
出版狀態	已出版 - 10 1月 2021
事件	15th European Microwave Integrated Circuits Conference, EuMIC 2020 - Utrecht, Netherlands 持續時間: 11 1月 2021 → 12 1月 2021

出版系列

名字	EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	15th European Microwave Integrated Circuits Conference, EuMIC 2020
國家/地區	Netherlands
城市	Utrecht
期間	11/01/21 → 12/01/21

存取文件

10.1109/EuMIC48047.2021.00072

應用於小型無人飛行載具之W頻段雷達前端積體電路研製(3/3)
Chang, H.-Y. (PI)
1/08/19 → 31/01/21
研究計畫: Research

引用此

Li, J. W., Chen, W. C., Chou, J., Liu, Y. C., & Chang, H. Y. (2021). A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications. 於 EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference (頁 241-244). 文章 9337390 (EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EuMIC48047.2021.00072

Li, Jhe Wei ; Chen, Wei Cheng ; Chou, Jung 等. / A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications. EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2021. 頁 241-244 (EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference).

@inproceedings{18c256bdcca046e0b3c09e8992cd61cd,

title = "A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications",

abstract = "In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is-130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.",

keywords = "5G, CMOS, RFIC, local oscillation, low jitter, low phase noise, microwave, millimeter-wave",

author = "Li, {Jhe Wei} and Chen, {Wei Cheng} and Jung Chou and Liu, {Yu Cheng} and Chang, {Hong Yeh}",

note = "Publisher Copyright: {\textcopyright} 2021 EuMA.; 15th European Microwave Integrated Circuits Conference, EuMIC 2020 ; Conference date: 11-01-2021 Through 12-01-2021",

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Li, JW, Chen, WC, Chou, J, Liu, YC & Chang, HY 2021, A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications. 於 EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference., 9337390, EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference, Institute of Electrical and Electronics Engineers Inc., 頁 241-244, 15th European Microwave Integrated Circuits Conference, EuMIC 2020, Utrecht, Netherlands, 11/01/21. https://doi.org/10.1109/EuMIC48047.2021.00072

A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications. / Li, Jhe Wei; Chen, Wei Cheng; Chou, Jung 等.
EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc., 2021. p. 241-244 9337390 (EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference).

研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審

TY - GEN

T1 - A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications

AU - Li, Jhe Wei

AU - Chen, Wei Cheng

AU - Chou, Jung

AU - Liu, Yu Cheng

AU - Chang, Hong Yeh

PY - 2021/1/10

Y1 - 2021/1/10

N2 - In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is-130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.

AB - In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is-130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.

KW - 5G

KW - CMOS

KW - RFIC

KW - local oscillation

KW - low jitter

KW - low phase noise

KW - microwave

KW - millimeter-wave

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U2 - 10.1109/EuMIC48047.2021.00072

DO - 10.1109/EuMIC48047.2021.00072

M3 - 會議論文篇章

AN - SCOPUS:85100931092

T3 - EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference

SP - 241

EP - 244

BT - EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 15th European Microwave Integrated Circuits Conference, EuMIC 2020

Y2 - 11 January 2021 through 12 January 2021

ER -

Li JW, Chen WC, Chou J, Liu YC, Chang HY. A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications. 於 EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference. Institute of Electrical and Electronics Engineers Inc. 2021. p. 241-244. 9337390. (EuMIC 2020 - 2020 15th European Microwave Integrated Circuits Conference). doi: 10.1109/EuMIC48047.2021.00072

A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications

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