A 28 dBm P_out 5-GHz CMOS power amplifier using integrated passive device power combining transformer

This work presents a 5-GHz power amplifier (PA) based on a tsmc™ 0.18-μm CMOS process. A high quality factor (Q) transformer for use by the PA was fabricated using wafer-level integrated passive device (IPD) technology and stacked on top of the active region of the CMOS PA chip. PAs with and without the IPD transformer were designed and their performance was compared. For a 1.8-V supply voltage, the IPD CMOS-PA achieved an output power of 28 dBm and power added efficiency (PAE) of 25%; these were, respectively, 1.3 dBm and 6% higher than the corresponding output parameters of the typical CMOS PA at the same power consumption. In sending OFDM/64-QAM modulated signals, the IPD CMOS-PA produced a measured adjacent channel power radio (ACPR) and error vector magnitude (EVM) of -43 dBc and 1.6%, respectively.