A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash with Excellent Immunity to Sneak Path

E. Ray Hsieh, Yen Chen Kuo, Chih Hung Cheng, Jing Ling Kuo, Meng Ru Jiang, Jian Li Lin, Hung Wen Chen, Steve S. Chung, Chuan Hsi Liu, Tse Pu Chen, Shih An Huang, Tai Ju Chen, Osbert Cheng

研究成果: 雜誌貢獻期刊論文同行評審

10 引文 斯高帕斯(Scopus)

摘要

In this paper, we have demonstrated an oxygen-vacancy-based bipolar RRAM on a pure logic 14-nm-node HKMG FinFET platform. A unit cell of the memory consists of a control transistor (FinFET) and a storage transistor (a second FinFET). The later performs as a bipolar RRAM. This unit cell can be integrated in an AND-type memory array. The memory cell has an ON/OFF ratio equal to 200 and 400 for the n-type and p-type FinFET RRAMs, respectively, endurance larger than 400 and 1000 times for n- and p-type devices, respectively, and the retention test for over 1 month under 125 °C temperature environment. To analyze the array performance of the AND-type FinFET RRAM at the circuit level, we have further discussed the issues of the sneak path and disturbance, in which an active-fin isolation of FinFET in an AND-type array has been suggested to minimize the leakage current induced by sneak paths. The results have shown a large window with up to 103 ON/OFF ratio, 30% standby power reduction, and 90% active power reduction with reference to the conventional AND-type array. As a result, the bipolar FinFET RRAM exhibits great potential for the embedded memory applications, in particular it can be extended to 28-nm HKMG and the FinFET platform beyond 14-nm technology node, to fill the Moore's gap between the high-performance logic and the embedded memory.

原文???core.languages.en_GB???
文章編號8089812
頁(從 - 到)4910-4918
頁數9
期刊IEEE Transactions on Electron Devices
64
發行號12
DOIs
出版狀態已出版 - 12月 2017

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