A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process

Keyphrases

• Phase-locked Loop 100%
• Output Frequency 100%
• Adaptive Bandwidth 100%
• Charge Pump 50%
• Reference Frequency 50%
• Supply Voltage 25%
• Power Dissipation 25%
• Switched Capacitor 25%
• CMOS Process 25%
• SPICE Model 25%
• Jitter Performance 25%
• Leakage Current 25%
• Phase Margin 25%
• Processing Temperature 25%
• Output Process 25%
• Loop Bandwidth 25%
• Loop Filter 25%
• Nanoscale Engineering 25%
• Multiplication Factor 25%
• Output Temperature 25%
• Constant Phase 25%
• Programmable Current Mirrors 25%
• Equivalent Resistors 25%

Engineering

• Phase Locked Loop 100%
• Output Frequency 75%
• Simulation Result 50%
• Charge Pump 50%
• Reference Frequency 50%
• Supply Voltage 25%
• Energy Dissipation 25%
• Multistage 25%
• Nanoscale 25%
• Phase Margin 25%
• Loop Bandwidth 25%
• Loop Filter 25%
• Multiplication Factor 25%
• Reduce Leakage 25%
• Switched Capacitor 25%
• Current Mirror 25%